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10/15 10/8 OS作業
名稱	10/8 OS作業
日期	10/15
課程名稱	作業系統
指導教師	劉艾華

1.
Reason1 caches are useful when two or more components need to
exchange data, and the components perform transfers at different speeds. E.g., the
CPU registers and the disk are two such components. Caches solve this problem by
providing a buffer of intermediate speed to store part of the data in the slow component.
If the fast component finds the data it needs in the cache, it need not wait for the slower
component. The data in the cache must be kept consistent with the data
Reason2 cache is used in prefetching of instructions in the CPU execution cycle – we
introduce a cache to hold the next few instructions, so that we do not have to wait for
slow memory access. In this case, the cache is more like a pipeline.
Problems solved by caches: improve speed for communication between components
with different speeds.
Problems created by caches: since cache hold temporary information
for a slower memory component, we need to maintain consistency between the
copy in the cache with its actual value in the memory component. This requires extra
checking when writing to memory, etc.
Why not just replace the slow component by a large cache? First problem is economic
– cache memory is usually much more expensive than the slower memory that it is a
surrogate for. Second is difference in technology – usually cache memory is dynamic
(it does not retain its information when power is turned off, and thus it cannot be a
complete substitute for permanent memory such as a disk).



2.
An interrupt is a hardware-generated change-of-flow within the system. An interrupt
handler is summoned to deal with the cause of the interrupt; control is then returned to the
interrupted context and instruction.
A trap is a software-generated interrupt. An interrupt can be used to signal the completion
of an I/O to obviate the need for device polling. A trap can be used to call operating system
routines or to catch arithmetic errors.
Interrupts are hardware interrupts, while traps are software-invoked interrupts. Occurrences
of hardware interrupts usually disable other hardware interrupts, but this is not true for traps.
If you need to disallow hardware interrupts until a trap is served, you need to explicitly clear
the interrupt flag. And usually the interrupt flag on the computer affects (hardware) interrupts
as opposed to traps. This means that clearing this flag will not prevent traps. Unlike traps, interrupts
should preserve the previous state of the CPU.
Yes. User programs create traps for debugging purposes. A trap can be used to call the OS routines or
to catch arithmetic errors.
3.
A device controller is a part of a computer system that makes sense of the signals going to, and coming from the CPU.Any device
connected to the computer is connected by a plug and socket, and the socket is connected to a device controller.
It functions as a bridge between the device and the operating system.The electrical part of an I/O device is known as a
device controller and can take the form of a chip on personal computers.
The Device Controller receives the data from a connected device and stores it temporarily in some special purpose
registers (i.e. local buffer) inside the controller. Then it communicates the data with a Device Driver .
For each device controller there is an equivalent device driver which is the standard interface through which the device
controller communicates with the Operating Systems.
A device driver is a computer program that operates or controls a particular type of device that is attached to a computer.
A driver provides a software interface to hardware devices.
Yes there is.CPU and device controllers all use a common bus for communication.
4.
Interrupt (interrupt) handling mechanism
In order to quickly handle common interrupt, OS give a table to store the interrupt service function of the entry point,
If an interrupt occurs, you can quickly look-up table to find the function you want the service, this table is called the interrupt handler (Interrupt Handler),
are usually placed in local memory began. Each interrupt event will provide
Short program to service this interrupt, the interrupt service routine call (Interrupt Service Routine;
ISR). And the interrupt vector (Interrupt vector) is a figure from the 00H to FFH, is used to judge
Break interrupt type.

更新日期：2015/10/22 下午 09:06:22